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eMMC + UFS (Managed NAND)
Description
For system designs with mass storage needs, developers must keep up with the increasingly complex error correction code (ECC) implementation and data management requirements of MLC and TLC NAND flash devices. Micron’s e.MMC and UFS memory solutions can help developers overcome these challenges, offering quick system integration suited for a wide range of automotive, industrial and consumer applications. Micron’s e.MMC and UFS memory combines a NAND flash memory device with a JEDEC-compliant controller in an industry-standard BGA package. This single-package solution manages operations—such as wear levelling, bad block management and device mapping— internally, simplifying system development work. e.MMC/UFS also implements error handling internally, which removes the burden from the host processor, thereby optimizing system performance.
Features
- Density - eMMC: 32-256GB, UFS: 32-256GB
- Ballout and package - Industry-standard 153-ball BGA
- Sequential write - eMMC- Up to 240 MB/s + UFS- Up to 1,200 MB/s
- Sequential read - eMMC- Up to 330 MB/s + UFS- Up to 1,700 MB/s
- Random write - eMMC- Up to 45,000 IOPS
- Random read - eMMC- Up to 54,000 IOPS
- Temperature - Industrial (–40˚C to 85˚C), Automotive (–40˚C to 105˚C)
- Version - e.MMC- v.5.1 / UFS- v.2.1/3.1
- NAND Type - 3D TLC
- Voltage Range - e.MMC- Dual Voltage- 1.7-1.95V/2.7-3.6V + UFS- 1.2 / 3.3V